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LT6411 1 6411f typical application features applications description 650mhz differential adc driver/dual selectable gain ampli er the lt ? 6411 is a dual ampli? er with individually selectable gains of +1, +2 and C1. the ampli? ers have excellent dis- tortion performance for driving adcs as well as excellent bandwidth and slew rate for video, data transmission and other high speed applications. single-ended to differential conversion with a system gain of 2 is particularly straight- forward by con? guring one ampli? er with a gain of +1 and the other ampli? er with a gain of C1. the LT6411 can be used on split supplies as large as 6v and on a single supply as low as 4.5v. each ampli? er draws only 8ma of quiescent current when enabled. when disabled, the output pins become high impedance and each ampli? er draws less than 350a. the LT6411 is manufactured on linear technologys proprietary, low voltage, complimentary, bipolar process and is available in the ultra-compact, 3mm 3mm, 16pin qfn package. 650mhz C3db small-signal bandwidth 600mhz C3db large-signal bandwidth high slew rate: 3300v/s easily con? gured for single-ended to differential conversion 200mhz 0.1db bandwidth user selectable gain of +1, +2 and C1 no external resistors required 46.5dbm equivalent oip3 at 30mhz when driving an adc im3 with 2v p-p composite, differential output: C87dbc at 30mhz, C83dbc at 70mhz C77db sfdr at 30mhz, 2v p-p differential output 6ns 0.1% settling time for 2v step low supply current: 8ma per ampi? er differential gain of 0.02%, differential phase of 0.01 50db channel separation at 100mhz wide supply range: 2.25v (4.5v) to 6.3v (12.6v) 3mm 3mm 16-pin qfn package differential adc driver single-ended to differential conversion differential video line driver differential adc driver 30mhz 2-tone 32768 point fft, LT6411 driving an ltc ? 2249 14-bit adc , lt, ltc and ltm are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. 5v a in 6411 ta01a ltc2249 14-bit adc 80msps a in + + + v cc v ee dgnd en LT6411 30mhz 1.9v dc 1.9v dc input 370 ? 370 ? 24 ? 24 ? 370 ? 370 ? frequency (mhz) 0 ?40 amplitude (dbfs) ?20 ?00 ?0 0 ?0 5 15 20 40 6411 ta01b ?0 ?0 ?30 ?10 ?0 ?0 ?0 ?0 ?0 10 25 30 35 32768 point fft tone 1 at 29.5mhz, ?dbfs tone 2 at 30.5mhz, ?dbfs im3 = ?7dbc
LT6411 2 6411f electrical characteristics package/order information absolute maximum ratings total supply voltage (v cc to v ee ) ..........................12.6v input current (note 2) ..........................................10ma output current (continuous) ...............................70ma en to dgnd voltage (note 2) ..................................5.5v output short-circuit duration (note 3) ............ inde? nite operating temperature range (note 4) ... C40c to 85c speci? ed temperature range (note 5) .... C40c to 85c storage temperature range ................... C65c to 125c junction temperature ........................................... 125c (note 1) symbol parameter conditions min typ max units v os input referred offset voltage v in = 0v, v os = v out /2 3 10 20 mv mv i in input current C17 50 a r in input resistance v in = 1v 150 500 k c in input capacitance f = 100khz 1 pf v cmr maximum input common mode voltage minimum input common mode voltage v cc C 1 v ee + 1 v v psrr power supply rejection ratio v s (total) = 4.5v to 12v (note 6) 56 62 db i psrr input current power supply rejection v s (total) = 4.5v to 12v (note 6) 1 4 a/v a v err gain error v out = 2v C1.2 5 % a v match gain matching v out = 2v 1 % v out maximum output voltage swing r l = 1k r l = 150 r l = 150 3.70 3.25 3.10 3.95 3.6 v v v i s supply current, per ampli? er 811 14 ma ma supply current, disabled, per ampli? er v en = 4v v en = open 22 0.5 350 350 a a i en enable pin current v en = 0.4v v en = v + C200 C95 0.5 50 a a dgnd en v cc v cc v ee v ee v ee nc in2 + in2 in1 in1 + out2 v cc v ee out1 16 1 2 3 4 12 11 10 9 5678 15 14 17 top view ud package 16-lead (3mm 3mm) plastic qfn 13 t jmax = 125c, ja = 68c/w, jc = 4.2c/w exposed pad (pin 17) is v ee , must be soldered to pcb order part number ud part marking* LT6411cud LT6411iud lcgp lcgp order options tape and reel: add #tr lead free: add #pbf lead free tape and reel: add #trpbf lead free part marking: http://www.linear.com/leadfree/ consult ltc marketing for parts speci? ed with wider operating temperature ranges. *temperature grade is identi? ed by a label on the shipping container. the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v s = 5v, a v = 2, r l = 150 , c l = 1.5pf, v en = 0.4v, v dgnd = 0v, unless otherwise noted.
LT6411 3 6411f symbol parameter conditions min typ max units i sc output short-circuit current r l = 0 , v in = 1v 50 105 ma sr slew rate 1v on 2v output step (note 9) 1700 3300 v/s C3db bw small-signal C3db bandwidth v out = 200mv p-p , single ended 650 mhz 0.1db bw gain flatness 0.1db bandwidth v out = 200mv p-p , single ended 200 mhz fpbw full power bandwidth 2v differential v out = 2v p-p differential, C3db 600 mhz full power bandwidth 2v v out = 2v p-p (note 7) 270 525 mhz full power bandwidth 4v v out = 4v p-p (note 7) 263 mhz all hostile crosstalk f = 10mhz, v out = 2v p-p f = 100mhz, v out = 2v p-p C75 C50 db db t s settling time 0.1% to v final , v step = 2v 6 ns t r , t f small-signal rise and fall time 10% to 90%, v out = 200mv p-p 550 ps dg differential gain (note 8) 0.02 % dp dif? erential phase (note 8) 0.01 deg electrical characteristics the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v s = 5v, a v = 2, r l = 150 , c l = 1.5pf, v en = 0.4v, v dgnd = 0v, unless otherwise noted. the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v cc = 5v, v ee = 0v, a v = 2, no r load , v en = 0.4v, v dgnd = 0v, unless otherwise noted. symbol parameter conditions min typ max units noise/harmonic performance input/output characteristics 1mhz signal hd second/third harmonic distortion 2v p-p differential 2v p-p differential, r l = 200 differential C88 C87 dbc dbc imd3 1m third-order imd 2v p-p differential composite, f1 = 0.95mhz, f2 = 1.05mhz C93 dbc 2v p-p differential composite, f1 = 0.95mhz, f2 = 1.05mhz, r l = 200 differential C91 dbc oip3 1m output third-order intercept differential, f1 = 0.95mhz, f2 = 1.05mhz (note 10) 49.5 dbm nf noise figure single ended 25.1 db e n1m input referred noise voltage density 8 nv/hz p1db 1db compression point (note 10) 19.5 dbm 10mhz signal hd second/third harmonic distortion 2v p-p differential 2v p-p differential, r l = 200 differential C85 C76 dbc dbc imd3 10m third-order imd 2v p-p differential composite, r l = 1k, f1 = 9.5mhz, f2 = 10.5mhz C92 dbc 2v p-p differential composite, f1 = 9.5mhz, f2 = 10.5mhz, r l = 200 differential C89 dbc oip3 10m output third-order intercept differential, f1 = 9.5mhz, f2 = 10.5mhz (note 10) 49 dbm nf noise figure single ended 24.7 db e n10m input referred noise voltage density 7.7 nv/hz p1db 1db compression point (note 10) 19.5 dbm
LT6411 4 6411f electrical characteristics the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v cc = 5v, v ee = 0v, a v = 2, no r load , v en = 0.4v, v dgnd = 0v, unless otherwise noted. symbol parameter conditions min typ max units 30mhz signal hd second/third harmonic distortion 2v p-p differential 2v p-p differential, r l = 200 differential C77 C64 dbc dbc imd3 30m third-order imd 2v p-p differential composite, f1 = 29.5mhz, differential, f2 = 30.5mhz C87 dbc 2v p-p differential composite, f1 = 29.5mhz, f2 = 30.5mhz, r l = 200 differential C75 dbc oip3 30m output third-order intercept differential, f1 = 29.5mhz, f2 = 30.5mhz (note 10) 46.5 dbm nf noise figure single ended 24.6 db e n30m input referred noise voltage density 7.6 nv/hz p1db 1db compression point (note 10) 19.5 dbm 70mhz signal hd second/third harmonic distortion 2v p-p differential 2v p-p differential, r l = 200 differential C63 C52 dbc dbc imd3 70m third-order imd 2v p-p differential composite, f1 = 69.5mhz, differential, f2 = 70.5mhz C83 dbc 2v p-p differential composite, f1 = 69.5mhz, f2 = 70.5mhz, r l = 200 differential C64 dbc oip3 70m output third-order intercept differential, f1 = 69.5mhz, f2 = 70.5mhz (note 10) 44.5 dbm nf noise figure single ended 24.7 db e n70m input referred noise voltage density 7.7 nv/hz p1db 1db compression point (note 10) 19.5 dbm note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: this parameter is guaranteed to meet speci? ed performance through design and characterization. it is not production tested. note 3: as long as output current and junction temperature are kept below the absolute maximum ratings, no damage to the part will occur. depending on the supply voltage, a heat sink may be required. note 4: the LT6411c is guaranteed functional over the operating temperature range of C40c to 85c. note 5: the LT6411c is guaranteed to meet speci? ed performance from 0c to 70c. the LT6411c is designed, characterized and expected to meet speci? ed performance from C40c and 85c but is not tested or qa sampled at these temperatures. the LT6411i is guaranteed to meet speci? ed performance from C40c to 85c. note 6: the two supply voltage settings for power supply rejection are shifted from the typical v s points for ease of testing. the ? rst measurement is taken at v cc = 3v, v ee = C1.5v to provide the required 3v headroom for the enable circuitry to function with en, dgnd and all inputs connected to 0v. the second measurement is taken at v cc = 8v, v ee = C4v. note 7: full power bandwidth is calculated from the slew rate: fpbw = sr/( ? v p-p ) note 8: differential gain and phase are measured using a tektronix tsg120yc/ntsc signal generator and a tektronix 1780r video measurement set. the resolution of this equipment is better than 0.05% and 0.05. ten identical ampli? er stages were cascaded giving an effective resolution of better than 0.005% and 0.005. note 9: slew rate is 100% production tested on channel 1. slew rate of channel 2 is guaranteed through design and characterization. note 10: since the LT6411 is a feedback ampli? er with low output impedance, a resistive load is not required when driving an adc. therefore, typical output power is very small. in order to compare the LT6411 with typical g m ampli? ers that require 50 output loading, the LT6411 output voltage swing driving an adc is converted to oip3 and p1db as if it were driving a 50 load.
LT6411 5 6411f typical performance characteristics supply current per ampli? er vs temperature supply current per ampi? er vs supply voltage supply current per ampli? er vs en pin voltage output offset voltage vs temperature positive input bias current vs input voltage en pin current vs en pin voltage output voltage vs input voltage output voltage swing vs i load (output high) output voltage swing vs i load (output low) en pin voltage (v) 0 en pin current ( a) 0 ?0 ?0 ?0 ?0 ?00 ?20 ?40 6411 g06 2 5 1 34 v s = 5v v dgnd = 0v t a = ?5 c t a = 25 c t a = 125 c source current (ma) 0 output voltage (v) 5 4 3 2 1 0 40 6411 g08 10 20 30 100 50 60 70 80 90 v s = 5v a v = 2 v in = 2v t a = 125 c t a = ?5 c t a = 25 c 040 10 20 30 100 50 60 70 80 90 sink current (ma) output voltage (v) 0 ? ? ? ? ? 6411 g09 v s = 5v a v = 2 v in = ?v t a = 125 c t a = ?5 c t a = 25 c all measurements are per ampli? er with single-ended outputs unless otherwise noted. ?5 ?5 25 45 temperature ( c) 125 6411 g01 ?5 5 65 85 105 12 v en = 0v v en = 0.4v 10 8 6 4 supply current (ma) 2 0 v s = 5v r l = v in + , v in = 0v 6411 g02 12 10 8 6 supply current (ma) 4 2 0 0123456 total supply voltage (v) 7 8 9 10 11 12 v cc = ? ee v en , v dgnd , v in + , v in = 0v t a = 25 c 6411 g03 12 supply current (ma) 10 8 6 4 2 0 0 0.5 1.0 1.5 2.0 en pin voltage (v) 2.5 3.0 3.5 4.0 t a = ?5 c t a = 25 c t a = 125 c v s = 5v v dgnd = 0v v in + , v in = 0v temperature ( c) offset voltage (mv) 6411 g04 20 15 10 5 0 ? ?0 ?5 ?0 ?5 ?5 25 45 125 ?5 5 65 85 105 v s = 5v v in = 0v a v = 2 input voltage (v) ?.5 in + bias current ( a) ?0 0 1.5 6411 g05 ?0 ?0 ?.5 ?.5 0.5 2.5 20 v s = 5v a v = 2 t a = ?5 c t a = 25 c t a = 125 c 6411 g07 input voltage (v) ?.5 output voltage (v) 5 4 3 2 1 0 ? ? ? ? ? ?.5 ?.5 0.5 4.5 ?.5 ?.5 1.5 2.5 3.5 t a = 25 c t a = ?5 c v s = 5v r l = 1k a v = 1 t a = 125 c
LT6411 6 6411f input noise spectral density positive input impedance vs frequency psrr vs frequency frequency response vs gain con? guration gain flatness vs frequency frequency response with capacitive loads harmonic distortion vs frequency, differential input harmonic distortion vs amplitude, 30mhz, differential input harmonic distortion vs load, 30mhz, differential input typical performance characteristics all measurements are per ampli? er with single-ended outputs unless otherwise noted. 6553 g10 frequency (khz) 0.001 0.01 1 10 100 0.1 1000 100 10 1 i n input noise (nv/ hz or pa/ hz) v s = 5v a v = 2 t a = 25 c e n 6411 g11 frequency (mhz) 0.01 0.1 input impedance (k ? ) 10 100 1000 1 1000 100 10 1 0.1 v s = 5v v in = 0v t a = 25 c 6411 g12 frequency (mhz) rejection ratio (db) 0.001 0.01 1 10 100 0.1 70 60 50 40 30 20 10 0 v s = 5v a v = 2 t a = 25 c ?srr +psrr psrr frequency (mhz) ? gain (db) 0 3 6 9 0.1 10 100 1000 6411 g13 ? 1 a v = 2, v out = 200mv p-p a v = 1, a v = ?,v out = 200mv p-p a v = 2, v out = 2v p-p a v = 1, v out = 2v p-p a v = ?, v out = 2v p-p v s = 5v r l = 150 ? t a = 25 c frequency (mhz) 5.8 normalized gain (db) 6.4 6.5 5.7 5.6 6.3 6.0 6.2 6.1 5.9 0.1 10 100 1000 6411 g14 5.5 1 channel 1 channel 2 v s = 5v a v = 2 v out = 200mv p-p r l = 150 ? t a = 25 c frequency (mhz) amplitude (db) 18 16 14 12 10 8 6 4 2 0 ? ? ? 6553 g15 0.1 1 10 100 1000 c l = 12pf c l = 6.8pf c l = 2.2pf v s = 5v a v = 2 v out = 2v p-p r l = 150 ? t a = 25 c frequency (mhz) 1 ?00 distortion (dbc) ?0 ?0 ?0 ?0 10 100 6411 g16 0 v out = 2v p-p , differential a v = 2, v cc = 5v v ee = 0v, v cm = 1.6v differential r load t a = 25 c ?0 ?0 ?0 ?0 ?0 hd3, r l = 200 ? hd3, r l = hd2, r l = hd2, r l = 200 ? differential output amplitude (v p-p ) 0.4 ?00 distortion (dbc) ?0 ?0 ?0 ?0 0 ?0 0.8 1.2 1.4 6411 g17 ?0 ?0 ?0 ?0 0.6 1.0 1.6 hd3 hd2 1.8 2.0 a v = 2, v cc = 5v v ee = 0v, v cm = 1.6v r l = t a = 25 c differential r load ( ? ) 0 distortion (dbc) ?0 ?0 0 800 1011 g06 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?00 200 100 400 300 600 hd3 hd2 700 900 500 1000 v out = 2v p-p , differential a v = 2, v cc = 5v v ee = 0v, v cm = 1.6v t a = 25 c
LT6411 7 6411f third order intermodulation distortion vs frequency, differential input output third order intercept vs frequency, differential input output impedance vs frequency small-signal transient response video amplitude transient response large-signal transient response crosstalk vs frequency gain error distribution gain matching distribution 6411 g21 frequency (mhz) 0.01 10 100 output impedance ( ? ) 100 1 0.1 0.1 1 10 100 0 1000 disabled v en = 4v enabled v en = 0.4v v s = 5v r l = 150 ? t a = 25 c ?.0 0 2.0 3.0 ?.0 ?.0 1.0 gain matching?etween channels (%) percent of units (%) 35 30 25 20 15 10 5 0 6411 g27 v s = 5v v out = 2v r l = 150 ? t a = 25 c typical performance characteristics all measurements are per ampli? er with single-ended outputs unless otherwise noted. frequency (mhz) 0 ?00 third order imd (dbc) ?0 ?0 ?0 ?0 0 ?0 20 40 50 6411 g19 ?0 ?0 ?0 ?0 10 30 60 70 r l = 200 ? r l = v out = 2v p-p , composite, differential 1mhz tone spacing a v = 2, v cc = 5v v ee = 0v, v cm = 1.6v differential r load t a = 25 c frequency (mhz) 0 oip3 (dbm) 40 50 60 30 50 6411 g20 30 20 10 20 40 60 70 10 0 r l = computed for 50 ? environment r l = 200 ? v out = 2v p-p , composite, differential 1mhz tone spacing a v = 2, v cc = 5v v ee = 0v, v cm = 1.6v differential r load t a = 25 c time (ns) output (v) 0.15 0.10 0.05 0 ?.05 ?.10 ?.15 4 8 12 16 6411 g22 20 2 0 6 10 14 18 v in = 100mv p-p a v = 2 v s = 5v r l = 150 ? t a = 25 c time (ns) 0 output (v) 1.0 1.5 2.0 16 6411 g23 0.5 0 ?.5 246 810 12 14 18 20 v in = 700mv p-p a v = 2 v s = 5v r l = 150 ? t a = 25 c time (ns) 0 output (v) 4 3 2 1 0 ? ? ? ?4 16 6411 g24 4 8 12 20 14 2 6 10 18 v in = 2.5v p-p a v = 2 v s = 5v r l = 150 ? t a = 25 c frequency (mhz) 1 ?20 amplitude (db) ?00 ?0 ?0 ?0 0 10 100 1635 g25 1000 ?0 v s = 5v v out = 2v p-p r l = 150 ? t a = 25 c drive 2 listen 1 drive 1 listen 2 gain error?ndividual channel (%) ?.0 percent of units (%) 25 30 35 3.0 6411 g26 15 0 ?.0 ?.0 0 1.0 2.0 40 20 10 5 v s = 5v v out = 2v r l = 150 ? t a = 25 c
LT6411 8 6411f pin functions v ee (pins 1, 2): negative supply voltage. v ee pins are not internally connected to each other and must all be con- nected externally. proper supply bypassing is necessary for best performance. see the applications information section. v ee (pins 3, 7): negative supply voltage for output stage. v ee pins are not internally connected to each other and must all be connected externally. proper supply bypassing is necessary for best performance. see the applications information section. nc (pin 4): this pin is not internally connected. out2 (pin 5): output of channel 2. the gain between the input and the output of this channel is set by the connection of the channel 2 input pins. see table 1 in applications information for details. v cc (pins 6, 9): positive supply voltage for output stage. v cc pins are not internally connected to each other and must all be connected externally. proper supply bypassing is necessary for best performance. see the applications information section. out1 (pin 8): output of channel 1. the gain between the input and the output of this channel is set by the connection of the channel 1 input pins. see table 1 in applications information for details. v cc (pin 10): positive supply voltage. v cc pins are not internally connected to each other and must all be con- nected externally. proper supply bypassing is necessary for best performance. see the applications information section. en (pin 11): enable control pin. an internal pull-up resis- tor of 46k will turn the part off if the pin is allowed to ? oat and de? nes the pins impedance. when the pin is pulled low, the part is enabled. dgnd (pin 12): digital ground reference for enable pin. this pin is normally connected to ground. in1 + (pin 13): channel 1 positive input. this pin has a nominal impedance of 400k and does not have an internal termination resistor. in1 C (pin 14): this pin connects to the internal resistor network of the channel 1 ampli? er, connecting by a 370 resistor to the inverting input. in2 C (pin 15): this pin connects to the internal resistor network of the channel 2 ampli? er, connecting by a 370 resistor to the inverting input. in2 + (pin 16): channel 2 positive input. this pin has a nominal impedance of 400k and does not have an internal termination resistor. exposed pad (pin 17): the pad is internally connected to v ee (pin 1). if split supplies are used, do not tie the pad to ground.
LT6411 9 6411f applications information power supplies the LT6411 can be operated on as little as 2.25v or a single 4.5v supply and as much as 6v or a single 12v supply. internally, each supply is independent to improve channel isolation. note that the exposed pad is internally connected to v ee and must not be grounded when using split supplies. do not leave any supply pins disconnected or the part may not function correctly! enable/shutdown the LT6411 has a ttl compatible shutdown mode con- trolled by the en pin and referenced to the dgnd pin. if the ampli? er will be enabled at all times, the en pin can be connected directly to dgnd. if the enable function is desired, either driving the pin above 2v or allowing the internal 46k pull-up resistor to pull the en pin to the top rail will disable the ampli? er. when disabled, the dc output impedance will rise to approximately 740 through the internal feedback and gain resistors (assuming inputs at ground). supply current into the ampli? er in the disabled state will be primarily through v cc and approximately equal to (v cc C v en )/46k. it is important that the two following constraints on the dgnd pin and the en pin are always followed: v cc C v dgnd 3v C0.5v v en C v dgnd 5.5v split supplies of 3v to 5.5v will satisfy these require- ments with dgnd connected to 0v. in dual supply cases with v cc less than 3v, dgnd should be connected to a potential below ground such as v ee . since the en pin is referenced to dgnd, it may need to be pulled below ground in those cases. in order to protect the internal enable circuitry, the en pin should not be forced more than 0.5v below dgnd. in single supply applications above 5.5v, an additional resistor may be needed from the en pin to dgnd if the pin is ever allowed to ? oat. for example, on a 12v single supply, a 33k resistor would protect the pin from ? oating too high while still allowing the internal pull-up resistor to disable the part. the dgnd pin should not be pulled above the en pin since doing so will turn on an esd protection diode. if the en pin voltage is forced a diode drop below the dgnd pin, current should be limited to 10ma or less. the enable/disable times of the LT6411 are fast when driven with a logic input. turn on (from 50% en input to 50% output) typically occurs in less than 50ns. turn off is slower, but is less than 300ns. gain selection the gain of the internal ampli? ers of the LT6411 is con? g- ured by connecting the in + and in C pins to the input signal or ground in the combinations shown in figure 1. as shown in the simpli? ed schematic, the in C pins connect to the internal gain resistor of each ampli? er, and therefore, each pin can be con? gured independently. floating the in C pins is not recommended as the parasitic capacitance causes an ac gain of 2 at high frequencies, despite a dc gain of +1. both inputs are connected together in the gain of +1 con? guration to avoid this limitation. + + +v ? LT6411 in+ a v = +2 in out+ out + + +v ? LT6411 in+ a v = ? in out out+ 6411 f01 + + +v ? LT6411 in+ a v = +1 in out+ out figure 1. LT6411 con? gured in noninverting gain of 2, noninverting gain of 1 and inverting gain of 1, all shown with dual supp lies
LT6411 10 6411f applications information input considerations the LT6411 input voltage range is from v ee + 1v to v cc C 1v. therefore, on split supplies the LT6411 input range is always as large as or larger than the output swing. on a single positive supply with a gain of +2 and in C con- nected to ground, however, the input range limit of +1v limits the linear output low swing to 2v (1v multiplied by the internal gain of 2). the inputs can be driven beyond the point at which the output clips so long as input currents are limited to 10ma. continuing to drive the input beyond the output limit can result in increased current drive and slightly increased swing, but will also increase supply current and may result in delays in transient response at larger levels of overdrive. dc biasing differential ampli? er applications the inputs of the LT6411 must be dc biased within the input common mode voltage range, typically v ee + 1v to v cc C 1v. if the inputs are ac coupled or dc biased be- yond the input voltage range of a driven a-to-d converter, dc biasing or level shifting will be required. in the basic circuit con? gurations shown in figure 1, the dc input common mode voltage and the differential input signal are both multiplied by the ampli? er gain. in the gain of +2 con? guration, the dc common mode voltage gain can be set to unity by adding a capacitor at the in C pins as shown in figure 2. if the inputs are ac coupled or the LT6411 is preceded by a highpass ? lter, the input common mode voltage can be set by resistor dividers as shown in figure 3. adding the blocking capacitor to the gain setting resistors sets the input and output dc common mode voltages equal. when using the LT6411 to drive an a-to-d converter, the dc common mode voltage level will affect the harmonic distortion of the combined ampli? er/adc system. figure 4 shows the measured distortion of an ltc2249 adc when driven by the LT6411 at different common mode voltage levels with the inputs con? gured as shown in figure 3. adjusting the dc bias voltage can optimize the design for the lowest possible distortion. if the input signals are within the input voltage range and output swing of the LT6411, but outside the input range of an adc or other circuit the LT6411 is driving, + + +v LT6411 in+ in c large v dc out+ out v dc v dc v dc 6411 f02 figure 2. LT6411 con? gured with a differential gain of 2 and unity dc common mode gain + + +v LT6411 in+ in ov ov out+ out v dc v dc v dc c large c large v + r1 r2 v + r1 r2 v dc 6411 f03 figure 3. using resistor dividers to set the input common mode voltage when ac coupling v cm (v) 1.6 distortion (dbc) ?0 ?5 hd3 hd2 im3 ?0 2.4 6411 f04 ?5 ?0 ?0 1.8 2.0 2.2 1.7 2.5 1.9 2.1 2.3 ?5 ?0 ?5 v cc = 5v, v ee = 0v a v = 2 t a = 25 c figure 4. harmonic and intermodulation distortion of the LT6411 driving an ltc2249 versus dc common mode voltage. harmonic distortion measured with a C1dbfs signal at 30.2mhz. intermodulation distortion measured with two C7dbfs tones at 30.2mhz and 29.2mhz
LT6411 11 6411f the output signals can be ac coupled and dc biased in a manner similar to what is shown at the inputs in figure 3. a simpler alternative when using an adc such as the ltc2249 is to use the adcs v cm pin to set the optimal common mode voltage as shown in figure 5. if unity common mode gain and difference mode response to dc is desired, there is another con? guration available. figure 6 shows the LT6411 connected to provide a differ- ential signal gain of +3 with unity common mode gain. for differential signal gain between unity and +3, three resistors can be added to provide attenuation and set the differential input impedance of the stage as illustrated in figure 7. the general expression for the differential gain is: a k k vdiff () =+ + 1 2 2 scaling factor k is the multiple between the two equal- value series input resistors and the resistor connected between the two positive inputs. the correct value of r for the external resistors can be computed from the desired differential input impedance, z in , as a function of k and the 370 internal gain setting resistors, as described in the equation: r z kzk in in = + () + () 370 370 2 1 ? ? in figure 7 k = 2 and r = 13.7 , setting the differential gain to +2 and the differential input impedance to ap- proximately 50 . applications information + + +v ? c large 10k LT6411 in+ in ov ov 6411 f05 c large 10k 2.2 f ltc2249 v cm + + +v LT6411 in+ in v cm out+ out v cm v cm v cm 6411 f06 figure 6. LT6411 con? gured for a differential gain of +3 and unity common mode gain with response to dc figure 5. level shifting the output common mode voltage of the LT6411 using the v cm pin of an ltc2249 + + +v LT6411 in+ r = 13.7 ? r = 13.7 ? in k ?r = 27.4 ? v cm out+ out v cm v cm v cm 6411 f07 figure 7. LT6411 con? gured with a differential input impedance of 50 , a differential gain of +2 and unity common mode gain
LT6411 12 6411f applications information layout and grounding it is imperative that care is taken in pcb layout in order to utilize the very high speed and very low crosstalk of the LT6411. separate power and ground planes are highly recommended and trace lengths should be kept as short as possible. if input or output traces must be run over a distance of several centimeters, they should use a controlled impedance with matching series and shunt resistances to maintain signal ? delity. series termination resistors should be placed as close to the output pins as possible to minimize output capacitance. see the typical performance characteristics section for a plot of frequency response with various output capaci- torsonly 12pf of parasitic output capacitance causes 6db of peaking in the frequency response! low esl/esr bypass capacitors should be placed as close to the positive and negative supply pins as possible. one 4700pf ceramic capacitor is recommended for both v cc and v ee . additional 470pf ceramic capacitors with minimal trace length on each supply pin will further improve ac and transient response as well as channel isolation. for high current drive and large-signal transient applications, additional 1f to 10f tantalums should be added on each supply. the smallest value capacitors should be placed closest to the LT6411 package. if the undriven input pins are not connected directly to a low impedance ground plane, they must be carefully bypassed to maintain minimal impedance over frequency. although crosstalk will be very dependent on the board layout, a recommended starting point for bypass capacitors would be 470pf as close as possible to each input pin with one 4700pf capacitor in parallel. to maintain the LT6411s channel isolation, it is bene? cial to shield parallel input and output traces using a ground plane or power supply traces. vias between topside and backside metal may be required to maintain a low inductance ground near the part where numerous traces converge. esd protection the LT6411 has reverse-biased esd protection diodes on all pins. if any pins are forced a diode drop above the positive supply or a diode drop below the negative sup- ply, large currents may ? ow through these diodes. if the current is kept below 10ma, no damage to the devices will occur. single-ended to differential converter because the gains of each channel of the LT6411 can be con? gured independently, the LT6411 can be used to provide a gain of +2 when amplifying differential signals and when converting single-ended signals to differential. with both channels connected to a single-ended input, one channel con? gured with a gain of +1 and the other con? gured with a gain of C1, the output will be a differential version of the input with twice the peak-to-peak (differential) amplitude. figure 8 shows the proper connections and figure 9 displays the resulting performance when driv- ing an ltc2249. this con? guration can preserve signal amplitude when converting single ended video signals to differential signals when driving double terminated cables. the 10k resistors in figure 8 set the common mode volt- age at the output. figure 8. single-ended to differential converter with gain of +2 and common mode control typical applications 5v v cc v ee dgnd en LT6411 out1 370 ? 370 ? 370 ? 370 ? out2 6411 f08 out + out in1 + in1 input 1 f in2 in2 + 10k 0.1 f + + 10k 5v v cm
LT6411 13 6411f typical applications figure 9. 2-tone response of the LT6411 con? gured with single-ended inputs driving the ltc2249 at 29.5mhz, 30.5mhz twisted-pair line driver the LT6411 is ideal when used for driving inexpensive unshielded twisted-pair wires as often found in telephone or communications infrastructure. the input can be com- posite video, or if three parts are used, rgb or similar and can be either single ended or differential. the LT6411 has excellent performance with all formats. double termination of the video cable will enhance ? delity and isolate the LT6411 from capacitive loads. although most twisted-pair cables have a characteristic impedance figure 10. twisted-pair driver frequency (mhz) 0 ?40 amplitude (dbfs) ?20 ?00 ?0 0 ?0 5 15 20 40 6411 f09 ?0 ?0 ?30 ?10 ?0 ?0 ?0 ?0 ?0 10 25 30 35 32768 point fft tone 1 at 29.5mhz, ?dbfs tone 2 at 30.5mhz, ?dbfs im3 = ?0dbc 13 50 ? 100 ? 50 ? 5v ?v 6,9,10 1,2,3,7 6411 f10 receiver 5 LT6411 a v = 2 in + in + 14 15 16 11,12 of 100 , the cables can be terminated with a smaller series resistance or a larger shunt resistance in order to compensate for attenuation. a typical circuit for a twisted- pair driver is shown in figure 10. single supply differential adc driver the LT6411 is well suited for driving differential analog to digital converters. the low output impedance of the LT6411 is capable of driving a variety of ? lters as well as interfacing with the typically high impedance inputs of adcs. in addition, the LT6411s excellent distortion allows the part to perform with an sfdr below the limits of many high speed adcs. the dc1057 demo board, shown sche- matically in figure 11 and physically in figure 12, allows implementation and testing of the LT6411 with a variety of different linear technology high speed adcs.
LT6411 14 6411f typical applications figure 11. dc1057 demo circuit schematic figure 12. layout of dc1057 demo circuit v cc in1 + 6 c d4 0.1 f c12 c9 c3 c d3 470pf c d1 0.1 f c d2 4700pf 9101112 12374 8 13 r10 r5 r7 v cc r37 opt r13 r38 opt r3 r2 opt r14 r18 v ee v cc r17 opt v cc r1 10 ? 0603 r8 10 ? 1% r9 10 ? 1% r12 10 ? 1% r35 12.1 ? 1% r36 12.1 ? 1% to adc inputs r11 10 ? 1% r19 0 ? 6411 f11 jp1 enable c1 opt ??case e1 v cc e2 gnd 1 2 3 14 15 16 5 c6 c7 a in + a in c4 c10 l1 tbd 0603 l2 tbd 0603 l3 tbd 0603 in1 in2 in2 + out1 v ee v cc v cc out2 v cc v cc v ee LT6411 en dgnd v ee v ee v ee v ee nc + c31 opt ??case e7 v ee opt e8 gnd + c5 c2 c11 r6 tbd 0603 r4 opt 0603 t1 etc1-1ttr j1 a in + j2 a in r16 0 ? c8 tbd 0603 c d5 470pf c d8 0.1 f 0603 c d6 4700pf 1 2 3 5 4 c d7 1 f
LT6411 15 6411f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. simplified schematic v cc en 1k v ee v cc 46k to other amplifier bias in + 150 ? 370 ? 370 ? dgnd v ee v cc in out v ee 6411 ss package description ud package 16-lead plastic qfn (3mm 3mm) (reference ltc dwg # 05-08-1691) 3.00 0.10 (4 sides) note: 1. drawing conforms to jedec package outline mo-220 variation (weed-2) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 bottom view?xposed pad 1.45 0.10 (4-sides) 0.75 0.05 r = 0.115 typ 0.25 0.05 1 pin 1 notch r = 0.20 typ or 0.25 45 chamfer 15 16 2 0.50 bsc 0.200 ref 0.00 ?0.05 (ud16) qfn 0904 recommended solder pad pitch and dimensions 1.45 0.05 (4 sides) 2.10 0.05 3.50 0.05 0.70 0.05 0.25 0.05 0.50 bsc package outline
LT6411 16 6411f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2006 lt 0606 ? printed in usa related parts typical application part number description comments lt1993-2 800mhz low distortion, low noise adc driver, a v = 2 3.8nv/hz total noise, low distortion to 100mhz lt1993-4 900mhz low distortion, low noise adc driver, a v = 4 2.4nv/hz total noise, low distortion to 100mhz lt1993-10 700mhz low distortion, low noise adc driver, a v = 10 1.9nv/hz total noise, low distortion to 100mhz lt1994 low noise, low distortion fully differential ampl? er 70mhz gain bandwidth differential in and out lt6402-6 300mhz low distortion, low noise adc driver, a v = 2 3.8nv/hz input referred noise, low distortion to 30mhz lt6553 650mhz gain of 2 triple video ampli? er triple ampli? er with fixed gain lt6554 650mhz gain of 1 triple video ampli? er triple ampli? er with fixed gain in cases where lowering the noise ? oor is paramount, adding higher order lowpass or bandpass ? ltering can signi? cantly increase signal-to-noise ratio. in figure 13, the LT6411 is shown driving an ltc2249 with a 2nd order lowpass ? lter that has been carefully chosen to ensure optimal intermodulation distortion. the response is shown in figure 14. the ? lter improves the snr over the un? ltered case by 6db to 69.5db. with the ? lter, the snr of the adc and the LT6411 are comparable; better snr can be achieved by using either a higher resolution adc or additional ? ltering. figure 15 shows the corresponding sfdr of C75.5dbc with a 30mhz tone. figure 16 shows the 2-tone response of the LT6411 with 29.5mhz and 30.5mhz inputs. note that 0dbfs corresponds to a 2v p-p differential signal. figure 13. optimized 30mhz LT6411 differential adc driver figure 15. snr and sfdr of the LT6411 and filter driving the ltc2249 figure 16. 2-tone response of the LT6411 and filter driving the ltc2249 at 29.5mhz, 30.5mhz figure 14. frequency response of the LT6411 and filter + + 55 ? 80.6 ? 80.6 ? 5v LT6411 390nh ltc2249 390nh 55 ? 10 ? a in a in + 10 ? 15pf 6411 f13 in+ in 1.9v dc 1.9v dc frequency (mhz) 0 ?40 amplitude (dbfs) ?20 ?00 ?0 0 ?0 5 15 20 40 6411 f15 ?0 ?0 ?30 ?10 ?0 ?0 ?0 ?0 ?0 10 25 30 35 8192 point fft f in = 30mhz, ?dbfs snr = 69.5db sfdr = 75.5db frequency (mhz) 1 0 gain (db) 3 6 9 10 100 1000 6411 f14 ? ? ? ?2 frequency (mhz) 0 ?40 amplitude (dbfs) ?20 ?00 ?0 0 ?0 5 15 20 40 6411 f16 ?0 ?0 ?30 ?10 ?0 ?0 ?0 ?0 ?0 10 25 30 35 32768 point fft tone 1 at 29.5mhz, ?dbfs tone 2 at 30.5mhz, ?dbfs im3 = ?9.7dbc

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